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SHELL = /bin/sh

.SUFFIXES:
.SUFFIXES: .cpp .o .c

### the user configuration makefile
include ${SOURCEROOT}/makefiles/config.mk

### Use a shell script to guess the compiler
ifeq ($(strip ${CXX}),)
CXX = $(shell ${SOURCEROOT}/makefiles/findcompiler.sh)
endif

### Define operating system and CPU
OS =$(subst ${empty} ${empty},_,$(shell uname -s))
CPU =$(subst ${empty} ${empty},_,$(shell uname -m))

### Define the empty string
empty =

### The platform is determined by OS CPU and compiler 
PLATFORM = ${OS}_${CPU}_${CXX}

### Default target is release, unless debug is given as goal
ifndef TARGET
TARGET = release
endif

### Concatenation of platform and target yields a string used as 
### suffix of makefiles and in the name of the builddir.
PLATFORM_TARG = ${PLATFORM}_$(TARGET)

### Include platform specific makefile
include  ${SOURCEROOT}/makefiles/${PLATFORM}.mk

### BUILD is the subdirectory where all builds reside.
BUILD                                                           = .build

### BUILDDIR is the directory where the compilation for a specific 
### platform and target combination takes place.
BUILDDIR                                                = ./${BUILD}/$(PLATFORM_TARG)

### LIBDIR is the directory where we stick .a files pertaining to 
### the specific combination of platform and target.
LIBDIR                                                  = ${SOURCEROOT}/lib/${PLATFORM_TARG}

### BINDIR is the directory where binary files are put.
BINDIR                                                  = ${SOURCEROOT}/bin

### Append path to compiler flags
CXXFLAGS                                                += -I${SOURCEROOT}/src -I${SOURCEROOT}/include

### Generate list of source files.
sources                                                 = $(shell ls *.cpp)
### Generate list if object files from list of sources.
objects                                                 = $(sources:.cpp=.o)
### Generate list if dependency files from list of sources.
deps                                                            = $(addprefix ${BUILDDIR}/,$(sources:.cpp=.d))

### Set up vpath so that make finds object files in builddir
### hence does not rebuild unneccesarily
VPATH                                                   = ${BUILDDIR}


### Make dependencies,
ifneq (clean,$(findstring clean,${MAKECMDGOALS}))
${BUILDDIR}/%.d:%.cpp 
        $(shell if \[ \! -d ${BUILDDIR} \] ; then mkdir -p ${BUILDDIR} ; fi)
        $(CXX) ${DEPFLAGS} ${CXXFLAGS} $< > $@

### Include dependencies - but not if we are cleaning
include ${deps}
endif

### Rule for building object files from C++ source files
%.o: %.cpp 
        $(shell if \[ \! -d ${BUILDDIR} \] ; then mkdir -p ${BUILDDIR} ; fi)
        ${CXX} -c ${CXXFLAGS} -o ${BUILDDIR}/$@ $<

### Rule for building object files from C source files
### I use a C++ compiler. I think this is best.
%.o: %.c 
        $(shell if \[ \! -d ${BUILDDIR} \] ; then mkdir -p ${BUILDDIR} ; fi)
        ${CXX} -c ${CXXFLAGS} -o ${BUILDDIR}/$@ $<